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MDT10P64
1. General Description
This EPROM-Based 8-bit micro-controller uses a fully static CMOS technology process to achieve higher speed and smaller size with the low power consumption and high noise immunity. On chip memory includes 2K words of ROM, and 128 bytes of static RAM. u u u u Synchronous serial port with SCM Parallel communication mode(PCM) TMR0 : 8-bit real time clock/counter TMR1 : 16-bit real time clock/count TMR2 : 8-bit clock/counter(internal) 4 types of oscillator can be selected by programming option: RCLow cost RC oscillator
2. Features
The followings are some of the features on the hardware and software : u u u u Fully CMOS static design 8-bit data bus On chip EPROM size : 2.0 K words Internal RAM size : 161 bytes (128 general purpose registers, 33 special registers) u u u u 37 single word instructions 14-bit instructions 8-level stacks Operating voltage : 2.5 V ~ 5.5 V (PRD Disable) 4.5 V ~ 5.5 V (PRD Enable) u u Operating frequency : DC ~ 20 MHz The most fast execution time is 200 ns under 20 MHz in all single cycle instructions except the branch instruction u Addressing modes include direct, indirect and relative addressing modes u u u u u Power-on Reset Power edge-detector Reset Power range-detector Reset Sleep Mode for power saving 8 interrupt sources: -External INT pin -TMR0 timer,TMR1 timer,TMR2 timer -PortB<7:4> interrupt on change -CCP,SCM,PCM u Capture,Compare,PWM module u u
LFXTLow frequency crystal oscillator XTALStandard crystal oscillator HFXTHigh frequency crystal oscillator On-chip RC oscillator based Watchdog Timer(WDT) 33 I/O pins with their own independent direction control
3. Applications
The application areas of this MDT10P64 range from appliance motor control and high speed auto-motive to low power remote transmitters/receivers, pointing devices, and telecommunications processors, such as Remote
controller, small instruments, toy, automobile and PC peripheral ... etc.
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P.1
2005/6 Ver1.4
MDT10P64
4. Pin Assignment
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P.2
2005/6 V1.4
MDT10P64
5. Pin Function Description
Pin Name PA0~PA3,PA5 RTCC/PA4 I/O I/O I/O Port A, TTL input level Real Time Clock/Counter, Schmitt Trigger input levels Open drain output PB0~PB7 I/O Port B, TTL input level / PB0:External interrupt input , PB4~PB7:Interrupt on pin change PC0~PC7 PD0~PD7 PE0~PE2 /MCLR OSC1/CLKIN OSC2/CLKOUT I/O I/O I/O I I O Port C, Schmitt Trigger input levels Port D, Schmitt Trigger input levels / TTL input level Port E, Schmitt Trigger input levels / TTL input level Master Clear, Schmitt Trigger input levels Oscillator Input/external clock input Oscillator Output/in RC modeA the CLKOUT pin has 1/4 frequency of CLKIN Vdd Vss Power supply Ground Function Description
6. Memory Map (A) Register Map
Address BANK0 00 01 02 03 04 05 06 07 08 09 0A Indirect Addressing Register RTCC PCL STATUS MSR Port A Port B Port C Port D Port E PCHLAT Description
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P.3
2005/6 V1.4
MDT10P64
Address 0B 0C 0E 0F 10 11 12 13 14 15 16 17 20~7F BANK1 01 05 06 07 08 09 0C 0E 12 14 A0~BF TMR CPIO A CPIO B CPIO C CPIO D CPIO E PIEB1 PSTA T2PER SCMSTA General purpose register INTS PIFB1 TMR1L TMR1H T1STA TMR2 T2STA SCMBUF SCMCTL CCPL CCPH CCPCTL General purpose register Description
(1) IAR ( Indirect Address Register) : R00 (2) RTCC (Real Time Counter/Counter Register) : R01
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P.4
2005/6 V1.4
MDT10P64
(3) PC (Program Counter) : R02,R0A Write PC --- from PCHLAT Write PC --- from PCHLAT LJUMP, LCALL --- from instruction word RTWI, RET --- from STACK
A11
A10~A8
A7~A0
Write PC --- from ALU LJUMP, LCALL --- from instruction word RTWI, RET, RTFI --- from STACK
(4) STATUS (Status register) : R03 Bit 0 1 2 3 4 5 Symbol C HC Z /PF /TF RBS0 Carry bit Half Carry bit Zero bit Power down Flag bit WDT Timer overflow Flag bit Register Bank Select bit : 0 : 00H --- 7FH ( Bank0 ) 1 : 80H --- FFH ( Bank1 ) 6-7 XX General purpose bit Function
(5) MSR (Memory Bank Select Register) : R04 Memory Bank Select Register : 0 : 00~7F (Bank 0) 1 : 80~FF (Bank1)
b7
b6
b5
b4
b3
b2
b1
b0
Indirect Addressing Mode (6) PORT A : R05 PA5~PA0, I/O Register (7) PORT B : R06 PB7~PB0, I/O Register
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P.5
2005/6 V1.4
MDT10P64
(8) PORT C : R07 PC7~PC0, I/O Register (9) PORT D : R08 PD7~PD0, I/O Register (10) PORT E : R09 PE2~PE0, I/O Register (11) PCHLAT : R0A
(12) INTS ( Interrupt Status Register ) : R0B Bit 0 1 2 3 Symbol RBIF INTF TIF RBIE Function PORT B change interrupt flag. Set when PB <7:4> inputs change Set when INT interrupt occurs. INT interrupt flag. Set when TMR0 overflows. 0 : disable PB change interrupt 1 : enable PB change interrupt 4 INTS 0 : disable INT interrupt 1 : enable INT interrupt 5 TIS 0 : disable TMR0 interrupt 1 : enable TMR0 interrupt 6 PEIE 0 : disable all peripheral interrupt 1 : enable all peripheral interrupt 7 GIS 0 : disable global interrupt 1 : enable global interrupt (13) PIFB1 (Peripheral Interrupt Flag Bit) : R0C Bit 0 Symbol TMR1IF TMR1 interrupt flag 0 : TMR1 did not overflow 1 : TMR1 overflowed 1 TMR2IF TMR2 interrupt flag 0 : No TMR2 to T2PER match occurred 1 : TMR2 to T2PER match occurred 2 CCPIF CCP interrupt flag 0 : No TMR1 capture/compare occurred 1 : A TMR1 capture/compare occurred Function
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P.6
2005/6 V1.4
MDT10P64
Bit 3 Symbol SCMIF SCM interrupt flag 0 G No read or write has occurred 1 G A read or a write has occurred 6~4 7 -PCMIF Unimplemented PCM interrupt flag 0 : No R/W operation has taken place 1 : A R/W operation has taken place Function
(14) TMR1L : R0E The LSB of the 16-bit TMR1
(15) TMR1H : R0F The MSB of the 16-bit TMR1
(16) T1STA : R10 Bit 0 Symbol TMR1ON 0 : Stop TMR1 1 : Enable TMR1 1 TMR1CLK 0 : Internal clock (Fosc/4) 1 : External clock from pin PC0 2 /T1SYNC TMR1CLK = 1 0 : Synchronize external clock 1 : Do not synchronize external clock TMR1CLK = 0 This bit is ignored 3 T1OSCEN 0 : TMR1 Oscillator is shut off 1 : TMR1 Oscillator is enable 5~4 T1CKPS1 ~ T1CKPS0 1 1 = 1:8 Prescale value 1 0 = 1:4 Prescale value 0 1 = 1:2 Prescale value 0 0 = 1:1 Prescale value 7~6 -Unimplemented Function
(17) TMR2 : R11 TMR2 register
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P.7
2005/6 V1.4
MDT10P64
(18) T2STA : R12 Bit 1~0 Symbol T2CKPS1 ~ T2CKPS0 2 TMR2ON 0 0 = Prescaler is 1 0 1 = Prescaler is 4 1 x = Prescaler is 16 0 : TMR2 is off 1 : TMR2 is on 7~3 -Unimplemented Function
(19) SCMBUF : R13 Serial communication port buffer
(20) SCMCTL : R14 Bit 3~0 Symbol SCM3 ~ SCM0 Function 0 0 0 0 : SCM master mode , clock = Fosc/4 0 0 0 1 : SCM master mode , clock = Fosc/16 0 0 1 0 : SCM master mode , clock = Fosc/64 0 0 1 1 : SCM master mode , clock = TMR2 output/2 0 1 0 0 : SCM slave mode , clock = SCK pin , /SS control enable 0 1 0 1 : SCM slave mode , clock = SCK pin , /SS control disable 4 CKS 0 : Transmit happens on rising edge , receive on falling edge, Idle state for clock is low level. 1 : Transmit happens on falling edge , receive on rising edge, Idle state for clock is high level 5 SCMEN 0 : Disable SCM, then pc3, pc4, pc5 is I/O prot 1 : Enable SCM 6 SCMROI 0 : No overflow 1 : Overflow 7 WCOL 0 : No collision 1 : The SCMBUF is written while it is still transmitting the previous word
(21) CCPL : R15 Capture/Compare/PWM LSB
(22) CCPH : R16 Capture/Compare/PWM MSB
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P.8
2005/6 V1.4
MDT10P64
(23) CCPCTL : R17 Bit 3~0 Symbol CCPM3 ~ CCPM0 0 0 0 0 : CCP off 0 1 0 0 : Capture mode , every falling edge 0 1 0 1 : Capture mode , every rising edge 0 1 1 0 : Capture mode , every 4th rising edge 0 1 1 1 : Capture mode , every 16th rising edge 1 0 0 0 : Compare mode , set output on match 1 0 0 1 : Compare mode , clear output on match 1 0 1 0 : Compare mode , generate software interrupt on match 1 0 1 1 : Compare mode , trigger special event 1 1 x x : PWM mode 5~4 7~6 PWMLSB -These bits are the two LSBs of the PWM duty cycle Unimplemented Function
(24) TMR (Time Mode Register) : R81 Bit Symbol Prescaler Value 000 001 010 011 2~0 PS2~0 100 101 110 Function RTCC rate 1:2 1:4 1:8 1 : 16 1 : 32 1 : 64 1 : 128 WDT rate 1:1 1:2 1:4 1:8 1 : 16 1 : 32 1 : 64 1 : 128
3
PSC
4
TCE
5
TCS
6
IES
7
PBPH
111 1 : 256 Prescaler assignment bit : 0 : RTCC 1 : Watchdog Timer RTCC signal Edge : 0 : Increment on low-to-high transition on RTCC pin 1 : Increment on high-to-low transition on RTCC pin RTCC signal set : 0 : Internal instruction cycle clock 1 : Transition on RTCC pin Interrupt edge select 0 : Interrupt on falling edge on PB0 1 : Interrupt on rising edge on PB0 PORTB3~0 pull-hi 0 : PORTB3~0 pull-hi are enable 1 : PORTB3~0 pull-hi are disable
(25) CPIO A (Control Port I/O Mode Register) : R85 x"0", I/O pin in output mode. x"1", I/O pin in input mode.
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P.9
2005/6 V1.4
MDT10P64
(26) CPIO B (Control Port I/O Mode Register) : R86 x"0", I/O pin in output mode. x"1", I/O pin in input mode. (27) CPIO C (Control Port I/O Mode Register) : R87 x"0", I/O pin in output mode. x"1", I/O pin in input mode. (28) CPIO D (Control Port I/O Mode Register) : R88 x"0", I/O pin in output mode. x"1", I/O pin in input mode. (29) CPIO E (Control Port I/O Mode Register) : R89 Bit 2~0 Symbol BIT2~BIT0 Port E control port I/O mode bits 0 : I/O pin in output mode 1 : I/O pin in input mode 3 4 -PCMSB Unimplemented 0 : General I/O mode 1 : PCM mode 5 IBOB 0 : No overflow occurred 1 : A write occurred when a previously input word has not been read 6 OBF 0 : The output buffer has been read 1 : The output buffer still holds 7 IBF 0 : No data has been received 1 : A data has been received and is waiting to be read (30) PIEB1 : R8C Bit 0 Symbol TMR1IE TMR1 interrupt enable bit 0 : Disable TMR1 interrupt 1 : Enable TMR1 interrupt 1 TMR2IE TMR2 interrupt enable bit 0 : Disable TMR2 interrupt 1 : Enable TMR2 interrupt 2 CCP1IE CCP1 interrupt enable bit 0G disable CCP1 interrupt 1G enable CCP1 interrupt 3 SCMIE SCM interrupt enable bit 0 : Disable SCM interrupt 1 : Enable SCM interrupt This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw Function Function
P.10
2005/6 V1.4
MDT10P64
Bit 6~4 7 Symbol -PCMIE Unimplemented PCM interrupt enable bit 0 : Disable PCM interrupt 1 : Enable PCM interrupt (31) PSTA : R8E Bit 0 1 Symbol PRDB PORB 0 : Power range-detector Reset occurred 1 : No Power range-detector Reset Occurred 0 : Power on Reset occurred 1 : No Power on Reset occurred (32) T2PER : R92 Timer2 period (33) SCMSTA : R94 Bit 0 Symbol BF 0 : Receive not complete 1 : Receive complete 7~1 -Unimplemented Function Function Function
(34) Configurable options for EPROM (Set by writer) :
Oscillator Type RC Oscillator
HFXT Oscillator XTAL Oscillator LFXT Oscillator
Watchdog Timer control Watchdog timer disable all the time Watchdog timer enable all the time
Power-range control Power-range disable Power-range enable This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw
P.11
2005/6 V1.4
MDT10P64
Oscillator-start Timer control 0ms 75ms
Power-edge Detect PED Disable PED Enable (B) Program Memory Address 000-7FF 000 004 Program memory
Security state Security Disable Security Enable
Description
The starting address of power on, external reset or WDT time-out reset. Interrupt vector
7. Reset Condition for all Registers
Register IAR RTCC PC STATUS MSR PORT A PORT B PORT C PORT D PORT E PCHLAT INTS PIFB1 TMR1H T1STA Address 00h 01h 0Ah,02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Fh 10h Power-On Reset, Power range detector Reset N/A xxxx xxxx 0000 0000 0000 0001 1xxx xxxx xxxx --xx xxxx xxxx xxxx xxxx xxxx xxxx xxxx ---- -xxx ---0 0000 0000 000x ---- 0000 xxxx xxxx --00 0000 /MCLR or WDT Reset N/A uuuu uuuu 0000 0000 0000 000# #uuu uuuu uuuu --uu uuuu uuuu uuuu uuuu uuuu uuuu uuuu ---- -uuu ---0 0000 0000 000u ---- 0000 uuuu uuuu --uu uuuu Wake-up from SLEEP N/A uuuu uuuu PC+1 000# #uuu uuuu uuuu --uu uuuu uuuu uuuu uuuu uuuu uuuu uuuu ---- -uuu ---u uuuu uuuu uuuu ---- uuuu uuuu uuuu --uu uuuu
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P.12
2005/6 V1.4
MDT10P64
Power-On Reset, Power range detector Reset xxxx xxxx 0000 0000 ---- -000 xxxx xxxx 0000 0000 xxxx xxxx xxxx xxxx --00 0000 1111 1111 --11 1111 1111 1111 1111 1111 1111 1111 0000 -111 0--- 0000 ---- --0u 1111 1111 ---- ---0
Register TMR1L TMR2 T2STA SCMBUF SCMCTL CCPL CCPH CCPCTL TMR CPIOA CPIOB CPIOC CPIOD CPIOE PIEB1 PSTA T2PER SCMSTA
Address 0Eh 11h 12h 13h 14h 15h 16h 17h 81h 85h 86h 87h 88h 89h 8Ch 8Eh 92h 94h
/MCLR or WDT Reset uuuu uuuu 0000 0000 ---- -uuu uuuu uuuu 0000 0000 uuuu uuuu uuuu uuuu --00 0000 1111 1111 --11 1111 1111 1111 1111 1111 1111 1111 0000 -111 0--- 0000 ---- --uu 1111 1111 ---- ---0
Wake-up from SLEEP uuuu uuuu uuuu uuuu ---- -uuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu --uu uuuu uuuu uuuu --uu uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu -uuu u--- uuuu ---- --uu 1111 1111 ---- ---u
Note : uxunchanged, xxunknown, - xunimplemented, read as "0" #xvalue depends on the condition of the following table
Condition /MCLR reset (not during SLEEP) /MCLR reset during SLEEP WDT reset (not during SLEEP) WDT reset during SLEEP Power-on reset Power-range reset
Status: bit 4 u 1 0 0 1 1
Status: bit 3 u 0 1 0 1 1
PSTA: bit 1 u u u u 0 u
PSTA: bit 0 u u u u x 0
Note : uxunchanged, xxunknown, - xunimplemented, read as "0"
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P.13
2005/6 V1.4
MDT10P64
8. Instruction Set :
Instruction Code 010000 00000000 010000 00000001 010000 00000010 010000 00000011 010000 00000100 010000 00000rrr 010001 1rrrrrrr 011000 trrrrrrr 111010 iiiiiiii 010111 trrrrrrr 011001 trrrrrrr 011010 trrrrrrr 011011 trrrrrrr 011100 trrrrrrr 011101 trrrrrrr 011110 trrrrrrr 010010 trrrrrrr 110100 iiiiiiii 010011 trrrrrrr 110101 iiiiiiii 010100 trrrrrrr 110110 iiiiiiii 011111 trrrrrrr 010110 trrrrrrr 010101 trrrrrrr 010000 1xxxxxxx 010001 0rrrrrrr 0000bb brrrrrrr 0010bb brrrrrrr 0001bb brrrrrrr 0011bb brrrrrrr Mnemonic Operands NOP CLRWT SLEEP TMODE RET CPIO R STWR R LDR R, t LDWI I SWAPR R, t INCR R, t INCRSZ R, t ADDWR R, t SUBWR R, t DECR R, t DECRSZ R, t ANDWR R, t ANDWI i IORWR R, t IORWI i XORWR R, t XORWI i COMR R, t RRR RLR CLRW CLRR BCR BSR R R, b R, b R, t R, t No operation Clear Watchdog timer Sleep mode Load W to TMODE register Return from subroutine Control I/O port register Store W to register Load register Load immediate to W Swap halves register Increment register Increment register, skip if zero Add W and register Subtract W from register Decrement register Decrement register, skip if zero AND W and register AND W and immediate Inclu. OR W and register Inclu. OR W and immediate Exclu. OR W and register Exclu. OR W and immediate Complement register Rotate right register Rotate left register Clear working register Clear register Bit clear Bit set Bit Test, skip if clear Bit Test, skip if set Function Operating None 0/WT 0/WT, stop OSC W/TMODE Stack/PC W/CPIO r W/R R/t I/W [R(0~3) R(4~7)] /t R + 1/t R + 1/t W + R/t R W/t or (R+/W+1/t) R 1/t R 1/t R a W/t i a W/W R a W/t i a W/W R o W/t i o W/W /R/t R(n) /R(n-1), C/R(7), R(0)/C R(n)/r(n+1), C/R(0), R(7)/C 0/W 0/R 0/R(b) 1/R(b) Skip if R(b)=0 Skip if R(b)=1 Z Z None None None None C TF, PF TF, PF None None None None Z None None Z None C, HC, Z C, HC, Z Z None Z Z Z Z Z Z Z C Status
BTSC R, b BTSS R, b
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P.14
2005/6 V1.4
MDT10P64
Instruction Code 100nnn nnnnnnnn 101nnn nnnnnnnn 110111 iiiiiiii 110001 iiiiiiii 111000 iiiiiiii 010000 00001001 Note : W WT TMODE CPIO TF PF PC OSC Inclu. Exclu. AND : : : : : : : : : : : Working register Watchdog timer TMODE mode register Control I/O port register Timer overflow flag Power loss flag Program Counter Oscillator Inclusive ` a' Exclusive ` o' Logic AND ` a' b t : : 0 1 : : : : : : Bit position Target : Working register : General register General register address Carry flag Half carry Zero flag Complement Don't care Immediate data ( 8 bits ) Mnemonic Operands LCALL n LJUMP n ADDWI i RTWI i Function Long CALL subroutine Long JUMP to address Add immediate to W Return, place immediate to W Subtract W from immediate Reture from interrupt Operating n/PC, PC+1/Stack n/PC W+i/W Stack/PC,i/W i-W/W Stack/PC,1/GIS None C,HC,Z None C,HC,Z None Status None
SUBWI i RTFI
R C HC Z / x I :
9. Electrical Characteristics
*Note: Temperature=25C 1.Operation Current : (1) HF (C=10p) , WDT - disable, PRD - disable 4M 2.5V 3.0V 4.0V 5.0V 5.5V 330u 480u 720u 1.4m 1.8m 10M 710u 910u 1.4m 2.6m 3.5m 20M 1.3m 1.7m 2.8m 4.3m 5.7m Sleep <1u <1u <1u <1u <1u
These parameters are for reference only.
(2) XT (C=10p) , WDT - disable, PRD - disable 1M 2.5V 3.0V 4.0V 5.0V 5.5V 100u 220u 310u 560u 780u 4M 310u 450u 660u 1.0m 1.5m 10M 600u 860u 1.3m 1.9m 2.9m Sleep <1u <1u <1u <1u <1u
These parameters are for reference only. This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw
P.15
2005/6 V1.4
MDT10P64
(3) LF (C=10p) , WDT - disable, PRD - disable, 32K 2.5V 3.0V 4.0V 5.0V 5.5V 10u 15u 25u 40u 80u 455K @2.7V 50u 60u 80u 140u 250u 1M 80u 90u 150u 230u 390u Sleep <1u <1u <1u <1u <1u
These parameters are for reference only.
(4) RC, WDT - disable; PRD - disable; @Vdd = 5.0V C R 4.7k 10k 3p 47k 100k 300k 470k 4.7k 10k 20p 47k 100k 300k 470k 4.7k 10k 100p 47k 100k 300k 470k 4.7k 10k 300p 47k 100k 300k 470k Freq. 8.4M 4.5M 1.1M 520K 180K 110K 3.2M 2.2M 500K 240K 81.2K 51.6K 1.4M 688K 152K 72.8K 24.4K 15.6K 592K 292K 64K 30.8K 10.4K 6.4K Current 1.7m 1.1m 430u 330u 165u 155u 1.3m 640u 230u 180u 150u 145u 500u 370u 165u 150u 140u 138u 350u 190u 147u 141u 137u 136u
These parameters are for reference only. This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw
P.16
2005/6 V1.4
MDT10P64
2. Input Voltage (Vdd = 5V) : Port Vil TTL Schmitt trigger Vih TTL Schmitt trigger Min Vss Vss 3.0V 3.8V Max 0.8V 0.6V Vdd Vdd
These parameters are for reference only.
Input Voltage (Vdd = 3V) : Port Vil TTL Schmitt trigger Vih TTL Schmitt trigger Min Vss Vss 2.0V 2.6V Max 0.4V 0.2V Vdd Vdd
These parameters are for reference only.
3. Output Voltage (Vdd = 5V) : PA,PB Voh Vol Voh Vol 3.5V 0.9V 4.2V 0.7V Condition Ioh = -20mA Iol = 20mA Ioh = -5mA Iol = 5mA
These parameters are for reference only.
4. Output Current (Max.) (Vdd = 5V) : I/O Port source current sink current These parameters are for reference only. Current 25mA 40mA
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P.17
2005/6 V1.4
MDT10P64
5. The basic WDT time-out cycle time : Time 2.5V 3.0V 4.0V 5.0V 5.5V 26 23 20 18 17 Unit = ms These parameters are for reference only.
6.PRD : (1)PRD reset voltage : Voltage Vih Vil 4.010% 3.610% Unit = V These parameters are for reference only.
(2) PRD reset current : Current 5.0V 4.0V 120 100 Unit = uA These parameters are for reference only.
7.Pull high resistor : Vdd PB3~0 Pull high 5V 40 3V 80
Unit = K Ohm These parameters are for reference only.
8.MCLR filter time : Vdd=5V time 640 Unit = ns These parameters are for reference only.
This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw
P.18
2005/6 V1.4

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